1. Technical Field
The present invention relates generally to serial interfaces.
2. Description of the Background Art
High-speed serial digital communication is constantly increasing in importance. The number of different industry standards for such communication is also increasing. Programmable logic device (“PLD”) technology allows one common hardware design (embodied in an integrated circuit) to be programmed to meet the needs of many different applications. PLDs with a given hardware design can be manufactured in large quantities at low cost. Each user then programs PLDs of that kind to meet that user's particular needs. The user does not have to do a custom integrated circuit design, with the attendant high cost, delay, and difficulty of revision if modifications are subsequently needed.
To facilitate the use of PLDs in applications involving high speed serial digital communication, it would be desirable to provide PLDs with high speed serial interface (“HSSI”) circuitry. However, there are a large number of high-speed serial communication standards or somewhat related, but perhaps non-standard, protocols that users of PLDs may want to employ. It would be wasteful and uneconomical to include a large number of different HSSI circuits on a PLD is wasteful, uneconomical, and very difficult or even impossible if the number of standards or protocols to be supported becomes very large. On the other hand, manufacturing the same basic PLD circuitry in several different versions, each with different HSSI circuitry to meet a different HSSI standard or protocol, is also uneconomical because it is contrary to the “economy of scale” benefit otherwise associated with manufacturing one common PLD circuit design in large volume.